1. Field of the Invention
The present invention generally relates to a gate-voltage control circuit, and more particularly to a gate voltage control circuit of a power amplifier which can improve the linearity and the efficiency of the power amplifier suitable for use in a digital mobile terminal.
2. Description of the Related Arts
In general, the efficiency and the linearity of power amplifiers are varied in contrary manners in accordance with the magnitudes of gate voltages. Thus, if the power amplifier is designed to be a class B power amplifier in which the gate voltage is applied with reduced toward a pinch-off voltage, the efficiency is increased while the linearity of the amplifier becomes poor. On the other hand, if the power amplifier is designed as a class A power amplifier in which the gate voltage is set for the operating Q point to be 50 percent of a saturation drain current Idss, the linearity of the power amplifier is improved, but the efficiency of the power amplifier is degraded. Because of these inherent characteristics of the power amplifier, when the gate voltage is made to be constant as in the conventional power amplifiers, it is impossible to control both the efficiency and the linearity depending on the magnitude of the output power. The conventional power amplifier represents more linearity than is needed and poor efficiency in low output power mode, whereas in the maximum output power, the power amplifier has good efficiency and poor linearity, resulting in the third-order intermodulation distortion IMD3 greater than -30 dBc. Therefore, this conventional amplifier is not suitable for use in digital devices which require a linearity of less than 30 dBc.
In a total DC power P.sub.DC supplied to a power amplifier, a dissipation power Pdiss consumed by a power FET (Field Effect Transistor) can be obtained by the following three equations. EQU P.sub.DC (W)=Pdiss+(Pout-Pin) (1) EQU PAE(%)=(Pour-Pin)/P.sub.DC !*100 (2) EQU Pdiss(W)=P.sub.DC -(Pout-Pin)=(Pout-Pin)(100/PAT-1) (3)
where, Pin is an input power, Pout is an output power, and PAE represents the efficiency.
By using the above equations (1) to (3), the dissipation power Pdiss consumed by the power FET in a power amplifier designed in a constant gate voltage applying type can be obtained as shown in FIG. 1. FIG. 1 is a diagram for showing the operating characteristics of a conventional power amplifier with the constant gate voltage applied such as the efficiency of the power amplifier and the dissipation power Pdiss of the power FET with respect to the output power.
When a supply voltage of 3.6 V is applied in a transmission frequency band ranged from 1750 to 1780 MHZ of a personal communication service (PCS), the power dissipation becomes minimum at a saturation output power region where the efficiency is at a maximum point. When the output power is lowered, the efficiency is rapidly reduced and the power dissipation is increased. The increase of the power consumption causes the power FET to be hot and, in the worst case the power FET may break down. Therefore, it is important, when the output power is lowered, to make the power dissipation have a value smaller than the saturation value by raising the efficiency of the power amplifier.
As explained so far, when the conventional power amplifier is used as a mobile telephone in a personal communication service using code divisional multiple access (CDMA) technique, the linearity of the output power to the input power and the efficiency of the power amplifier are required to be improved. Research has been conducted on feedforward, predistortion and feedback,and the results are published for improving the linearity of the power amplifier. However, these methods include complicated circuit structures which are suitable for only base stations. Accordingly, in the mobile station, simple linearity circuits most be developed. Further, because the efficiency of the power amplifier is improved according to the increase of the output power of the amplifier, most research has focused on improving maximum efficiency. As a result, the efficiency becomes poor in low output power, though the efficiency is sufficient near the saturation output power. The poor efficiency of the power amplifier in the low output power can increase the power dissipation of the power FET in proportion to the decreasing of the output power, which may cause thermal problems. On the other hand, because the power amplifier is normally operated in an average power level about 10 dB below the maximum output power, it is important to improve the efficiency at the average output power in order to lengthen the life of a battery used in the mobile station.